Ultra-low-power graphics IP leader Think Silicon will reportedly showcase the industry’s first RISC-V-based GPUs, the NEOX™ G-series and A-series, at Embedded World 2022. The company will also introduce NEMA®|pico-VG, the latest addition to the NEMA®|GPU family of MCU-driven SoCs that supports rich vector graphics and improves system performance by reducing CPU utilization by up to 95% efficiency.
NEOX™ G-Series and A-Series - A New Era of Smart GPU Architecture
NEOX™| G (Graphics) and A (Deep Learning Accelerator) Series IPs represent a new era of intelligent GPU architecture, with programmable compute shaders running on real-time operating systems (RTOS) and powered by lightweight graphics and machine learning frameworks support. A large number of multithreaded systems can be easily customized for graphics, machine learning, vision/video processing and general computing workloads by using a configurable programming library of the same hardware modules. The new product acts as a GPU platform and will be implemented in a 32-bit SoC addressing myriad applications including next-generation smartwatches, augmented reality (AR) glasses, video for surveillance and entertainment, and smart displays/interactions for point-of-sale terminal.
NEMA®|pico-VG – High Performance Graphics for Power, Size and Cost Constrained Products
Think Silicon's new NEMA®|pico-VG GPUs are the latest additions to high-performance and ultra-low-power graphics for displays in battery-operated, power-constrained products. The multi-core, vector and 2.5D raster graphics GPU supports clock frequencies of 90-500MHz, 70 fps and 800x600 resolution in a tiny 0.21mm2 silicon area. Combining hardware-accelerated vector and raster graphics in a single IP solution gives developers the freedom and flexibility to choose the best rendering technology based on the graphics content being displayed. NEMA®|pico-VG uses intelligent compression algorithms to efficiently manage valuable memory space, reducing CPU usage by up to 95% compared to software-only solutions. The combination of RTL hardware modules and software makes NEMA®|pico-VG an ideal high-performance graphics subsystem in power, size, and cost-constrained products such as smartwatches, fitness/GPS trackers, and smart home devices. NEMA®|pico-VG production-ready RTL is expected to begin shipping to customers in the fourth quarter of 2022.
"Introducing the first RISC-V-based GPU is an important milestone for the graphics industry and Think Silicon," said Ulli Mueller, director of IP licensing, sales and marketing at Think Silicon. "Our ultra-low-power, high-performance graphics solutions are designed to inspire developers to create superior user experiences for a variety of products and markets, while significantly reducing power consumption. We look forward to showcasing us at upcoming Embedded World events the latest innovations.”
At Embedded World, Think Silicon will also showcase their NEMA®|GUI-Builder, a fast and easy-to-learn tool that enables programmers to reduce SoC platform (MCU/MPU) effort by using drag-and-drop common controls GUI development time and input elements. NEMA®|GUI-Builder automatically generates power- and performance-optimized C code with a small memory footprint by leveraging the powerful 3D capabilities of the NEMA®|GPU family. NEMA®|GUI-Builder includes Think Silicon's NEMA®|GFX software API and its efficient compression technology NEMA®|TSC, which can also be used with non-Think Silicon GPUs.
Can RISC-V change the GPU?
Can RISC-V handle GPU transactions? This is a work in progress that can be achieved by creating a small area efficient design with custom programmability and scalability.
Anyone who has studied GPU architecture knows that this is the SIMD construct of a vector processor. It's an ultra-efficient parallel processor that's been used for everything from running simulations and great games to teaching robots how to get AI and helping smart people manipulate the stock market. It even checks my grammar as I write this.
But the GPU space has become a private one, with the inner workings being done by the IP and secret weapons of developers like AMD, Intel, Nvidia, and more. What if there was a new set of graphics instructions designed for 3D graphics and media processing? Well, there may be.
The new instructions are being built on the RISC-V basic vector instruction set. They will add support for new graph-specific data types as layered extensions in the spirit of the core RISC-V ISA. Supports vector, prior math, pixel and texture, and Z/Frame buffer operations. It could be a fused CPU-GPU ISA. The lilibrary - RISC 3D group calls it RV64X (Figure 1) because the instructions will be 64 bits long (32 bits won't be enough to support a robust ISA).
The group said their motivation and goal was to create a small, efficient design with custom programmability and scalability. It should provide low-cost IP ownership and development, not compete with commercial products. It can be implemented on FPGA and ASIC targets and is free and open source. The original design targets low power microcontrollers that will be Khronos Vulkan compatible and support other APIs (OpenGL, DirectX, etc.).
