Digital twin signaling is used to realize advanced prototype design of semiconductor wafers | Heisener Electronics
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Digital twin signaling is used to realize advanced prototype design of semiconductor wafers

Technology Cover
Post-datum: 2023-05-16, Keystone Electronics

Keysight Technologies has released a new Universal Signal Processing Architecture (USPA) modeling platform that enables semiconductor companies to fully prototype, validate, and pre-stream chips using fully compatible, standards-based digital twin signals in a real-time development environment. M8135A - Pre-configured USPA system suitable for single-channel transceiver related applications.

             

The flowsheet is the final step in the chip design process and an increasingly expensive process that leaves little room for design failure. If the initial design proves to be a failure after the flow sheet, the chipmaker must go back to the drawing board with a new "redesign," which can take 12 months or more to complete. In addition to tying up valuable research and development resources, these chip redesigns could cause chipmakers to miss a narrow time-to-market window.

To reduce the risk of design failure and costly redesign, the USPA platform provides complete digital twin signaling for chip designers and engineers to validate designs before they commit to the chip. The USPA platform provides designers with an alternative to the original proprietary custom prototype modeling system by integrating ultra-fast signal converters with high-performance, fully modular field Programmable Gate Array (FPGA) prototyping systems.

      


The USPA system supports the highest performance optoelectronic development projects by performing high-speed digital simulation through ADC ADC interfaces with rates up to 68GS/s and DAC DAC DAC interface with rates up to 72GS/s. It also offers a wide range of input/output interfaces for applications including 6G wireless development, digital RF memory, advanced physics research and high-speed data acquisition applications, such as radar and radio astronomy.

Two flexible configurations are also available, a pre-configured system for single-channel transceiver applications and a fully configurable modular component that can be flexibly combined to support a wide range of single-channel and multi-channel applications. In addition, pre-configured systems can be expanded with additional components that take advantage of the modularity, scalability, and cost-efficient reusability of the platform architecture.

Hong Jiang, CEO of Avance Semi, Inc., said: "When we started developing our first ASIC for the coherent fiber communications market, we understood that we might only have one chance to get it right, and that the second streaming sheet would be so expensive and time-consuming that we might miss the narrow time-to-market window. With the USPA platform and our system integration efforts, we can optimize and validate our designs in real time during the design process. It's like a "free pre-stream slice" that we can run as many times as we need. This approach saves development time and costs, while significantly improving our confidence in the design and product release schedule."

         


Dr. Joachim Peerlings, Vice President and General Manager of Network and Data Center Solutions at Keysight Technologies, said: "By accelerating chip development and reducing associated risks, Keysight Technologies USPA provides a new end-to-end solution that addresses the challenges of developing leading-edge technology in a high-cost design environment. This powerful platform provides chip developers with a digital twin for their future chip products, enabling them to fully validate their designs and algorithms before incurring the expense and risk of streaming chips."

   

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