Altera - New Spectra-Q Engine accelerates FPGA and SoC design

Altera introduced the Spectra-Q engine, the core technology of the company's proven Quartus II software, designed to improve design productivity and time to market for next-generation programmable devices. The Spectra-Q engine extends Altera's Quartus II software leadership with new features that provide unprecedented compile-time improvements, universal fast-track design input, and embedded IP integration. The company says that users can now design and implement at a higher level of abstraction, significantly accelerating the design cycle and meeting the next generation of design opportunities. "Because FPGAs and SoCs provide significant enhancements through millions of logic device devices, support for hundreds of interface protocols, and new enhanced function blocks, software design tools must be more productive than logic components. Speed ??expansion. "Said Alex Grbic, senior director of software and IP marketing at Altera. "The Spectra-Q engine is a game-changing combination of software technology that significantly speeds up the design process by reducing design iterations while continuing to provide the industry's fastest compilation time." The Spectra-Q engine has faster algorithms without the need for a complete Design compilation allows incremental design changes. The engine also has a hierarchical database that enables users to preserve the layout and routing information of IP blocks while making changes to other parts of the IP module. design. This helps ensure a stable design, eliminates unnecessary timing closure, and reduces compilation time. The new engine also includes a general-purpose advanced design compiler to improve the quality of results and achieve tighter integration between the Quartus II software and various front-end tools. BluePrint Platform Designer Introduction Built on the Spectra-Q engine is the industry's first platform design tool called BluePrint, which enables designers to perform architecture exploration and allocate interfaces with greater efficiency. The tool allows designers to explore and create legitimate IO placements in advance through real-time assembler inspections, reducing design iterations by a factor of 10. The tool also includes clocking and core planning capabilities to significantly reduce the number of design iterations required for timing closure. Versatile and fast-tracking design input – The new Spectra-Q engine also quickly tracks design input from software, hardware, and DSP designers. With multiple common design flows, designers can target FPGAs more efficiently in their favorite language or design environment. In addition to providing support for the latest HDL language, the new engine is also designed to support Altera's new HLS A ++ compiler. (Advanced Synthesis) Create IP cores from C or C ++ and significantly increase productivity through faster simulation and IP generation. Quartus-II software and IP version 15.0 have been released Altera also today released Quartus II software 15.0, which is the # 1 software in the FPGA industry for performance and productivity. With this latest release, customers can take advantage of Altera's proven software tools, which provide industry-leading compilation time. Altera continues to extend its optimized IP products with the latest standards-based cores to achieve the highest design productivity. Quartus II software v15.0 introduces a new Hybrid Memory Cube and HDMI 2.0 MegaCore for the company's Arria 10 FPGAs and SoCs. The product portfolio also includes upgrades to the company's popular JESD204B core's features and device support to update Arria V support to 9.255Gbps and Cyclone V support to 5Gbps.